Speck 2e#
Speck 2e is a comprehensive, multicore spiking neural network processing chip capable of supporting large-scale spiking convolutional neural networks (SCNN) with a fully asynchronous chip architecture. It is fully configurable with the spiking neuron capacity of 0.32 million. Furthermore, it integrates a state-of-the-art dynamic vision sensor (DVS) that enables fully event-driven based, real-time, highly integrated solutions for varied dynamic visual scene.
Speck 2e can provide intelligence upon the scene at only milliwatts with a response latency in few milliseconds for classical applications, such as:
Event streaming classification
Pattern recognition
Smart device control, e.g. home appliance gesture control
Behavior detection
Security/safety monitoring to identify intruders or dangerous conditions.
Ultra-low power edge computing
Key features#
SPI master/slave interface for easy configuration
1x internal DVS
9x Convolutional (incl. pooling) layers
1x Readout layer operating in average, max, max average, or threshold modes
Asynchronous serial interface
Ultra-low average working power consumption (~ 1 mW)
DVS Layer#
128 x 128 Pixel Array
Noise filter and hot pixel rejection
On only / Off only / Both / Merge filtering of DVS event polarity
Sum pooling 1:1, 1:2, 1:4
ROI selection
Mirroring in both X/Y
Rotate in 90-degree steps
Fanout of 2
CNN Layer#
Max 9 convolutional processing layers
Max input dimension: 128x128
Max feature output size: 64x64
Max feature number: 1024
Weight resolution: 8 bit
Neuron state resolution: 16
Max kernel size: 16x16
Stride: {1, 2, 4, 8} independent in X/Y
Padding: [0..7] independent in X/Y
Pooling: 1:1, 1:2, 1:4
Fanout: 2
Leak operation on each layer
Spike decimator on each layer
Spike congestion balancer on each layer
Parallel computing on layer 0 and layer 1
Readout Layer#
15 classes and 1 idle class
Selectable moving average between 1, 6 and 32 time steps.
4 readout modes: inactive/threshold/max spiking class/specific class.
4 readout pins and 1 interrupt
How to use readout layer#
The readout layer in Speck 2e is the post-processing layer, the output results are readable through the 4 readout pins if an interrupt happens if configured correctly. Using the readout pin monitoring feature provided by the development kit, it is possible to validate your model close to real application scenarios.
The readout pin monitoring feature can be enabled via Samna. To enable the readout layer,
the enable
needs to be set
to True
first. An external slow clk must be provided on SLOW_CLK pin if
internal_slow_clk
is False
.
If you want to use counter based post-processing, please set
internal_slow_clk
to True
,
then there will be a post-processing every 128K DVS events from the internal DVS.
To forward your model’s last layer to the readout layer, you need to set its destination to 12.
The readout_configuration_sel
and
threshold
need to be set according to your model.
The moving average of the output neurons is compared to the threshold value to produce an output
if the received number of spikes is greater than the threshold.
The Speck 2e readout layer also provides a low pass filter. There are two selectable time windows,
16 (16 * slow clk period) and 32 (32 * slow clk period), which can be chosen by
low_pass_filter32_not16
. The default
value is False
, which is 16 * slow clk period. The low pass filter is enabled by default,
if you don’t want to use it, please set
low_pass_filter_disable
to True
.
Then we set readout_pin_monitor_enable
to True
in order to monitor the 4 readout pins. If there is a valid result, an interrupt
is generated by the chip and a ReadoutPinValue
event is sent to Samna.
The ReadoutPinValue
contains 2 members, an index, indicating the feature,
and a timestamp in microsecond, indicating when this event happened.
For more detail, please check ReadoutConfig
.